Crystal electronic timepiece

ABSTRACT

A crystal electronic timepiece comprising transistors operating as a switch and connected to the input of each stage of a multistage frequency divider respectively in a common-emitter circuit. A coincidence circuit is connected to the output of each stage of the multistage frequency divider in a common-emitter circuit. A pulse shaper controlling a current time indicating device is connected to the output of the coincidence circuit which is connected to the last stage of the multi-stage frequency divider. The proposed timepiece is intended to be used mainly as a crystal electronic watch.

United States Patent [I 1 Sharyapov et al.

[ 1 CRYSTAL ELECTRONIC TIMEPIECE [76] inventors: Shamil Akhmetovich Sharyapov,

ulitsa Ketcherskaya. korpus 1, kv. 39; Boris Nikolaevich Konshin, Abelmanovskaya ulitsa, 29, kv. 12; Viktor Alexandrovich 11in, ulitsa Gorkogo, 6, kv. 330', Vladimir lvanovich Kalashnikov, ulitsa Dybenko, 38, kv. 51; Vladimir Alesandrovich Shpolyansky, 1 Ambulatorny proczd, 5, korpus 2, kv. 28', Konstantin Petrovich Chirkin, Onezhskaya ulitsa, 28, kv. 85, all of Moscow, U.S.S.R.

[22] Filed: Nov. 5, 1973 [21] App]. No.1 412,822

Related US. Application Data [63] Continuation of Ser. No. 313,878. Dec. 11, 1972,

abandoned.

[30] Foreign Application Priority Data Dec. 9. 1971 U.S.S.R 1721461 [52] US. Cl. 58/23 A, 307/225 R [51] Int. Cl.... G04c 3/00, H03k 21/04, H03k 21/18 Oct. 22, 1974 [58] Field of Search 58/23 R, 23 A, 23 D; 307/225; 328/39, 42

[56] References Cited UNITED STATES PATENTS 3,363,410 1/1968 lmahashi 58/34 3,596,462 1/1969 Hayes 58/50 R Primary Examiner-Edith Simmons Jackmon Attorney, Agent, or FirmHolman & Stern [57] ABSTRACT A crystal electronic timepiece comprising transistors operating as a switch and connected to the input of each stage of a multistage frequency divider respectively in a common-emitter circuit. A coincidence circuit is connected to the output of each stage of the multistage frequency divider in a common-emitter circuit. A pulse shaper controlling a current time indicating device is connected to the output of the coincidence circuit which is connected to the last stage of the multi-stage frequency divider. The proposed timepiece is intended to be used mainly as a crystal electronic watch.

1 Claim, 3 Drawing Figures r Fragile/my divider crystal Pulse Mil/1710f :haper circa/f shuper dew L Fregwnry divider FIG. 2

faincidenae 4 Pulse Am/a FIE. S

CRYSTAL ELECTRONIC TIMEPIECE This is a continuation, of application Ser. No. 313,878, filed Dec. 11, 1972 now abandoned.

BACKGROUND OF THE INVENTION The present invention relates generally to time measuring instruments, and more particularly it relates to a crystal electronic timepiece.

A crystal electronic timepiece is known in the art comprising a crystal oscillator, a crystal oscillator pulse shaping stage connected to the output of the crystal oscillator, a multistage trigger frequency divider for dividing the pulses, and, connected to the output of the latter, a pulse shaper controlling a current time indicating device.

A disadvantage of the above crystal electronic timepiece is that it has a great number of series-connected stages in the multistage trigger frequency divider which makes the circuitry too cumbersome and unfit for micro-miniaturization and use in small-sized timepieces.

Another disadvantage of the prior-art timepiece is that it has a crystal oscillator pulse shaping stage connected to the output of the crystal oscillator.

Still another disadvantage is that phase instabilities of the stages are summed up and the resulting time interval instability increases to such an extent that it may significantly exceed the crystal oscillator error.

Yet another disadvantage of the above timepiece is an increased power consumption and low reliability in operation.

Also known in the art is a crystal electronic timepiece wherein connected to the output of the crystal oscillator is a crystal oscillator pulse shaping stage, whereupon crystal oscillator pulses are divided by a multistage frequency divider each stage whereof uses a multivibrator circuit with two transistors of different types of conductivity. Connected to the output of each stage in a common-emitter circuit is at least one coincidence circuit using one transistor. The coincidence circuit connected to the last stage of the multistage frequency divider has, connected to its output, a pulse shaper controlling a current time indicating device.

Due to the fact that in this timepiece, the division factor per stage is 3 to and more, the circuitry is substantially simplified and power consumption is rather low.

A disadvantage of this crystal electronic timepiece, as with the previously considered prior-art timepiece, is that it has a pulse shaping stage connected to the output of the crystal oscillator.

Another disadvantage, as in the previously considered timepiece, is summing up of phase instabilities of series-connected stages and, as a result, increasing of the resulting time interval instability.

Still another disadvantage of the above crystal electronic timepiece resides in the fact that use of two power sources is necessary.

Yet another disadvantage is poor performance at low supply voltages (less than 2 V).

SUMMARY OF THE INVENTION It is, therefore, an object of the present invention to provide a crystal electronic watch with a high stability of time intervals, reliably operating from a single power source at low supply voltages, having simplified electronic circuitry and low power consumption, as well as easy in manufacture and adjustment.

This object is achieved by that a crystal electronic watch wherein a crystal oscillator is electrically connected to a multistage frequency divider with each stage using a multivibrator circuit with two transistors of different types of conductivity and having connected to its output in a common-emitter circuit at least one coincidence circuit using one transistor, the coincidence circuit connected to the last stage of the multistage frequency divider having connected to its output a pulse shaper controlling a current time indicating device, has, according to the invention, connected in a common-emitter circuit to the input of each stage respectively transistors operating as a switch, the collector of each transistor being connected to the base of the transistor of the same type of conductivity switched into the first arm of the multivibrator whereto the transistor operating as the switch is connected, and, via a resistor, to the collector of the transistor of the opposite type of conductivity switched into the second arm of the multivibrator connected to the base circuit whereof is a timing RC-circuit, the base of each coincidence circuit transistor being connected via a resistor to the collector of the transistor switched into the first arm of the multivibrator of the stage having this particular coincidence circuit connected to its output, the collector of each coincidence circuit transistor being connected via a resistor to the base of the transistor operating as the switch connected to the input of the stage following this particular coincidence circuit, as well as to the collector of the preceding coincidence circuit transistor via a resistor if this coincidence circuit is even and directly if it is odd, and the collector of the transistor of the coincidence circuit connected to the output of the first stage being connected via a resistor to the input of the same stage.

BRIEF DESCRIPTION OF THE DRAWINGS Other objects and advantages of the present invention will become more apparent from the following description of embodiments thereof which are represented in the accompanying drawings, wherein:

FIG. I is a key diagram of a crystal electronic watch according to the invention;

FIG. 2 is a block diagram of the electric part of the novel crystal electronic watch with a low-frequency actuating device according to the invention; and

FIG. 3 (a, b, c, d, e) are time diagrams of the operation of the electric circuitry of the novel crystal electronic watch according to the invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT The circuitry of the proposed crystal electronic watch comprises a crystal oscillator 1 (FIG. I), a pulse shaper 2 shaping potentional pulses generated by the crystal oscillator 1 so as to facilitate division of the pulse recurrence frequency which pulse shaper serves at the same time as a preliminary stage of a multistage frequency divider 3. The multistage frequency divider 3 consists of stages 4, 5 and 6. Connected to the output of each stage 4, 5 and 6 of the frequency divider 3 are coincidence circuits 7, 8 and 9 respectively. Connected to the output of the coincidence circuit 9 is a pulse shaper l0 controlling a current time indicating device the output whereof is connected to an actuating device 11 comprising a winding 12 for actuating a clockwork mechanism (not shown), as well as for current time indication.

The crystal oscillator 1 uses a multivibrator circuit with two transistors 13 and 14 of different types of conductivity and with a crystal vibrator 15 inserted between the collector of the transistor 14 of n-p-n type conductivity and the base of the transistor 13 of p-n-p type conductivity. Resistors 16 and 17 connected into the emitter circuits of the transistors 13 and 14 are shunted by capacitors 18 and 19, the resistor 16 shunted by the capacitor 18 being connected to a bus 20 connected in turn to the positive terminal of a power source 21, while the resistor 17 shunted by the capacitor 19 is connected to a bus 22 connected to the negative terminal of the power source 21. The bus 22 is earthed.

Connected between the base of the transistor 13 and the bus 22 is a resistor 23 determining the base current of the transistor 13. The base of the transistor 14 is connected to the collector of the transistor 13 and the base of transistor 14 is further connected to bus 22 via a resistor 24. Switched into the collector circuit of the transistor 14 is a resistor 25 connected to the bus 20. The resistor 25 is a load resistor.

The pulse shaper 2, which at the same time is a preliminary frequency divider, uses a multivibrator circuit with transistors 26 and 27 of p-n-p and n-p-n types of conductivity respectively. The base circuit of the transistor 27 includes a timing RC-circuit comprising a capacitor 28 inserted between the base of the transistor 27 and the collector of the transistor 26, and a resistor 29 connected between the base of the transistor 27 and the bus 20 which resistor also determines the initial current of the base of the transistor 27. A resistor 30 inserted between the bus 22 and the collector of the transistor 26 is a load resistor.

The emitter of the transistor 27 is connected to the bus 22, while the emitter of the transistor 26 is connected to the bus 20. The base of the transistor 26 is connected to the collector of the transistor 27 via a resistor 31 limiting the collector current of the transistor 27.

Connected to the input of the pulse shaper 2 is a p-n-p transistor 32 operating as a switch so that its base-emitter circuit is placed in parallel with the resistor 25. The collector of the transistor 32 is connected to the base of the transistor 26 and, via the resistor 31, to the collector of the transistor 27.

Connected to the output of the pulse shaper 2 is the multistage frequency divider 3 with the stages 4, 5 and The stage 4 uses a multivibrator circuit with transistors 33 and 34 of p-n-p and n-p-n types of conductivity respectively switched into the second and first arms of the multivibrator.

Switched into the base circuit of the transistor 33 in the second arm of the multivibrator of the stage 4 is a timing RC-circuit comprising a capacitor 35 inserted between the base of the transistor 33 and the collector of the transistor 34, and a resistor 36 connected between the base of the transistor 33 and the bus 22. The emitter of the transistor 33 is connected to the bus 20, while the emitter of the transistor 34 is connected to the bus 22. A resistor 37 belonging to the first group of resistors is connected between the collector of the transistor 33 and the base of the transistor 34, and serves to limit the collector current of the transistor 33. The resistors of the first group are connected in a manner like the resistor 37.

A resistor 38 connected between the bus 20 and the collector of the transistor 34 is a load resistor.

Connected to the input of the stage 4 of the multistage frequency divider 3 in a common-emitter circuit is a n-p-n transistor 39 operating as a switch. The emitter of the transistor 39 is connected to the bus 22, the collector of the transistor 39 is connected via the resistor 37 to that of the transistor 33 of the opposite type of conductivity switched into the second arm of the multivibrator and to the base of the transistor 34 of the same type of conductivity switched into the first arm of the multivibrator, and the base of the transistor 39 is connected through a resistor 40 to the collector of the transistor 26.

Connected to the output of the stage 4 which is the first stage of the multistage frequency divider 3 is the coincidence circuit 7 using a transistor 41 the emitter whereof is connected to the bar 22. The connection of the input base-emitter circuit of the transistor 41 of the coincidence circuit 7 to the stage 4 of the frequency divider 3 is effected via a resistor 42 belonging to the second group of resistors which resistor is inserted between the collector of the transistor 34 switched into the first arm of the multivibrator of the stage 4 and the base of the transistor 41. The resistors of the second group are connected similarly to the resistor 42. The collector of the transistor 41 is connected to the resistor 40 which, by the other end, is connected to the base of the transistor 39 operating as the switch and connected to the input of the first stage 4 of the multistage frequency divider 3. The collector of the transistor 41 is connected via a resistor 43 belonging to the third group of resistors to the base of a transistor 44 operating as a switch and connected to the input of the next stage 5. The resistors of the third group are connected in much the same manner as the resistor 43.

The connections of the stages 5 and 6 of the frequency divider 3 are similar to those of the stage 4. They also use multivibrator circuits with transistors 45, 46 and 47, 48 of different types of conductivity. Timing RC-circuits switched into the base circuits of the transistors 45 and 47 respectively comprise capacitors 49, 50 and resistors 51, 52. Resistors 53, 54 of the first group of resistors are inserted between the collector of the transistor 45 and the base of the transistor 46, and between the collector of the transistor 47 and the base of the transistor 48 respectively. The resistors 53 and 54 serve to limit the collector current of the transistors 45 and 47. Connected to the output of each stage 5 and 6 are resistors 55 and 56 which are load resistors and connected to the collectors of the transistors 46 and 48 respectively, as well as to the bus 20. Thus, all the stages of the frequency divider 3 are similar and differ only in the capacitance values of the capacitors 35, 49 and 50.

The frequency divider stages may be taken in any number determined by the frequency of the crystal vibrator 15, by the division factor of each stage of the frequency divider 3, and by the frequency of the actuating device 11.

Connected to the input of each stage 5 and 6 respectively in a common-emitter circuit are n-p-n transistors 44 and 57 operating as a switch. The collectors of the transistors 44 and 57 are connected to the bases of the transistors 46 and 48 and, via the resistors 53 and 54 belonging to the first group of resistors, to the collectors of the transistors 45 and 47 respectively.

Connected to the outputs of the stages 5 and 6 in a common-emitter circuit are the coincidence circuits 8 and 9 with transistors 58 and 59 respectively. The emitters of the transistors 58 and 59 are connected to the bus 22. The bases of the transistors 58 and 59 are, via resistors 60 and 61 of the second group of resistors, connected to the collectors of the transistors 46 and 48 respectively. The collector of the transistor 58 of the coincidence circuit 8 is connected directly to the collector of the transistor 41 of the preceding coincidence circuit 7 and to the base of the transistor 57 connected to the input of the stage 6 via a resistor 62 of the third group of resistors.

The collector of the transistor 59 of the coincidence circuit 9 is connected to that of the transistor 58 of the preceding coincidence circuit 8 and to the base of the transistor 57.

Given below are some features of the circuitry of the novel crystal watch.

1. The collector of the transistor 58 of the coincidence circuit 8, which is second in the multistage frequency divider 3, is directly connected to the collector of the transistor 41 of the coincidence circuit 7, while the collector of the transistor 59 of the coincidence circuit 9, which is third, is connected to the collector of the transistor 58 of the coincidence circuit 8 via a resistor 63 belonging to the supplementary group of resistors. The resistors of the supplementary group are connected similarly to the resistor 63. The collector of the transistor 41 of the coincidence circuit 7, which is first in the multistage frequency divider 3, is connected to the input of the first stage via a supplementary resistor 64 connected by one end to the collector of the transistor 41 and by the other end to the resistor 40. Thus, when the stages of the multistage frequency divider 3 are connected in series, the collector of the even coincidence circuit transistor is directly connected to that of the preceding odd coincidence circuit transistor, while the collector of the odd coincidence circuit transistor is connected to that of the preceding even coincidence circuit transistor via a resistor.

2. A number of stages in the multistage frequency divider 3 and the division factor of a stage depend on the frequency of the oscillator l and requirements imposed on the circuitry of the crystal electronic watch. In any event, however, the circuits of the oscillator 1 and the stages 4, 5 and 6 will be practically identical which appreciably simplifies the circuitry of the crystal electronic watch, cuts down the number of components, and, due to the operation of transistors in microregimes, ensures higher reliability of the watch as a whole (one stage of the divider together with its coincidence circuit consume only some 0.3 to 0.5 ml A at a supply voltage of I to 1.35 V).

Referring now to FIG. 2 there is shown a block diagram of the electric part of the novel crystal electronic watch with the low-frequency actuating device 11 operating at frequencies from 1 to 2 Hz. In this case, the common pulse shaper 2 triggers parallel operation of two multistage frequency dividers 65 and 66. The circuits of the multistage frequency dividers 65 and 66 are similar to that of the multistage frequency divider 3 (FIG. 1). The division factor m of the frequency clivider 65 (FIG. 2) is chosen equal, for example, to 3"" where K, is the number of stages in the multistage frequency divider 65, while the division factor of the frequency divider 66 is n 2" where K is the number of stages in the latter frequency divider. In this case, the frequency of pulse signals at the output of a coincidence circuit 67 connected to the outputs of the multistage frequency dividers and 66 is n, X n times lower than the frequency of pulses of the crystal oscillator l.

The circuit shown in FIG. 2 provides for a low pulse frequency by using time-setting RC-circuits with a low time constant thus increasing the operational reliability, as well as reducing the size of the watch as compared to the circuit shown in FIG. 1.

The novel crystal electronic watch operates as follows.

The crystal oscillator 1 generates current pulses with stable frequency and with a period T which pulses are shown in FIG. 3a. In this case, during a short current pulse supplied by the power source 21 and negative with respect to the bus 20, the transistors 13 and 14 (FIG. 1) forming the multivibrator circuit are unblocked. During the greater part of the period (FIG. 3a), the transistors 13 and 14 14 (FIG. 1) are blocked so that the circuit of the oscillator l consumes very little power supplied by the power source 21. To improve self-excitation conditions in the circuit of the crystal oscillator 1, the resistors 16 and 17 switched into the emitter circuits of the transistors 13 and 14 are shunted by the capacitors 18 and 19. Stability of the output pulses of the crystal oscillator 1 are determined by that of the parameters of the crystal vibrator 15.

While there are no pulses at the input of the pulse shaper 2, the transistors 26 and 27 are unblocked and saturated because the resistor 29 creates an unblocking voltage at the base of the transistor 27, and the transistor 26 is unblocked through the resistor 31. As long as the base voltage of the transistor 32 is zero relative to the emitter, the transistor 32 is blocked. The transistors of the pulse shaper 2 remain in this state until a current pulse negative with respect to the emitter of the transistor 32 is applied from the output of the crystal oscillator l to the base of the transistor 32. In this case, the latter is unblocked, and the potential difference between its collector and emitter becomes equal to zero thus blocking the previously unblocked transistor 26. Tne collector voltage of the transistor 26 becomes equal to zero which brings about a potential jump at the collector negative with respect to the bus 22 which jump is applied via the capacitor 28 to the base of the transistor 27 blocking the latter. At the first instant, the blocking voltage between the base and the emitter of the transistor 27 is approximately equal to the supply voltage. Then, in the course of time z (FIG. 3b) determined by the time constant of the circuit comprising the capacitor 28 (FIG. 1) and the resistors 29 and 30, the capacitor 28 is recharged. This state of the circuit is illustrated in FIG. 312 wherein the lower level of the voltage at the output of the pulse shaper 2 (FIG. 1) (voltage across the resistor 30) corresponds to the time t, (FIG. 3b), i.e., the time during which the transistors 26 and 27 (FIG. 1) are blocked. In actual watch circuitry, the resistance of the resistor 30 is chosen much lower than that of the resistor 29 so that voltage variation across the resistor 30 during the time t, can be practically neglected and the voltage thereacross can be regarded as constant and equal to zero (to the voltage across the bus 22). Thus, the time during which the transistors 26 and 27 are blocked depends on recharging the capacitor 28 through the resistor 29. The capacitor is being recharged until the base voltage of the transistor 27 increases to the value equal to its unblocking threshold. In so doing, the transistor 27 is unblocked, as well as the transistor 26, and the capacitor 28 is recharged through the open junctions of the transistors 26 and 27 until the value of the power supply 21 voltage is reached.

During the interval t, (FIG. 31)), when the pacitor was being recharged, the transistors 26 and 27 (FIG. 1) remain blocked, and the pulses applied from the crystal oscillator 1 to the transistor 32 and unblocking the latter do not alter the state of these transistors, no signal appears at the output of the pulse shaper 2 on arrival of an n-l pulse from the crystal oscillator 1 during the whole interval t, (FIG. 3b). The next nth pulse coming from the crystal oscillator ll (FIG. I) after the transistors 26 and 27 have been unblocked, blocks these transistors, and processes similar to those described above occur in the pulse shaper 2. In this case, formed at the output of the pulse shaper 2 (across the resistor 30) are positive pulses with anamplitude equal to that of the supply voltage and a frequency n times lower than that of the crystal oscillator. Given in FIG. 3b is a time diagram of voltage pulses at the output of the pulse shaper 2 (FIG. 1) when signals are periodically supplied by the crystal oscillator 1. In this case, for the sake of clarity, the division factor of the pulse shaper 2 is chosen equal to 3 (n, 3), and generally it may be of any value due to parametric variations of the time-setting circuit comprising the capacitor 28 and the resistor 29.

Output pulses (FIG. 3b) from the pulse shaper 2 (FIG. 1) control the operation of the stage 4 of the multistage frequency divider 3. Before the arrival of the first pulse from the output of the pulse shaper 2, the transistors 33 and 34 of the multivibrator in the stage 4 of the multistage frequency divider 3 are unblocked and saturated. Such an initial state is ensured by the resistors 36 and 37. The transistor 39 is, in this case, blocked because its base voltage is equal to the voltage across the emitter connected to the bus 22 of the power source 21.

The first positive pulse applied from the collector of the transistor 26 via a resistor to the base of the transistor 39 unblocks the latter. Unblocking of the transistor 39 reverses the multivibrator thus blocking the transistors 33 and 34. At the moment of blocking of these transistors, the blocking voltage across the base of the transistor 33 jumps through the capacitor 35 by the supply voltage value. Further, as the capacitor 35 is being recharged through the resistors 36 and 38, the blocking voltage across the transistor base decreases. Corresponding to this process in FIG. 3c is the upper level of the output voltage of the resistor 38 maintained during a period t, (FIG. 3c). In this case, the second and third pulses from the output of the pulse shaper 2 unblock the transistor 39, the multivibrator, however, does not respond to the voltage variation across the collector of the transistor 39 because the multivibrator is in a state when the transistors 33 and 34 are blocked and the arriving second and third pulses block the transistors which have been already blocked. After a time interval t (FIG. 36) the transistors of the multivibrator return to the initial unblocked state between the third and fourth input pulses when the capacitor 35 (FIG. 1)

has been discharged to a voltage equal to the unblocking threshold of the transistor 33. Corresponding to this state in FIG. 30 is the lower level of the voltage across the output resistor 38. The capacitor is quickly charged at a low time constant through the open baseemitter and collector-emitter junctions of the transistors 33 and 34 respectively. The fourth pulse from the output of the pulse shaper 2, therefore, again reverses the multivibrator into a state with blocked transistors by unblocking the transistor 39.

Thus, the period of voltage pulses at the output of the stage 4 of the frequency divider 3 increases threefold as compared to the period of pulses of the pulse shaper 2, Le, the frequency at the output of the stage 4 of the frequency divider 3 is divided by three. The division factor of the stage 4, as well as that of the pulse shaper 2 depend on the time constant of the charging circuit consisting of the capacitor 35 and the resistor 36. The resistance of the resistor 38 is supposed to be much lower than that of the resistor 36.

The operating principle of the coincidence circuit 7 of the novel crystal electronic watch is based on inertia properties inherent in transistors. When the transistors 33 and 34 in the stage 4 of the multistage frequency divider 3 are unblocked, the transistor 41 of the coincidence circuit 7 is blocked because its base is connected via the resistor 42 and the saturated transistor 34 to the bus 22. When, during unblocking of the transistor 26, a positive pulse is applied from the output of the pulse shaper 2 simultaneously to the input of the stage 4 of the frequency divider 3 via the resistor and to the input of the stage 5 via the resistors 64 and 43, the transistors 33 and 34 are blocked and, consequently, the transistor 41 of the coincidence circuit 7 is unblocked. As long as unblocking of the transistor 41 is not instantaneous but takes some time determined by the properties of the transistor, the positive pulse from the collector of the transistor 26 has enough time to reach the input of the stage 5 of the multistage frequency divider 3 and to actuate upon the transistor 44 thus blocking the transistors 45 and 46 of the multivibrator. When the transistor 41 is unblocked, it shunts by its output simultaneously the input of the stage 5 of the multistage frequency divider 3 and, via the resistor 61, the input of the stage 4 of the frequency divider 3. In this case, external disturbances across the input cannot affect the state of the transistors in the stages 4 and 5 of the frequency divider 3. The leading edge of the positive pulse at the input of the stage 5 of the multistage frequency divider 3 coincides with that at the output of the pulse shaper 2. Consequently, phase errors appearing in the stage 4 of the multistage frequency divider 3 due to instability of pulse edges and the parameters of the transistor as the latter is being blocked or unblocked do not affect the operation of the stage 5 of the multistage frequency divider 3. The stability of output pulses at the input of the stage 5 of the multistage frequency divider 3, therefore, is determined only by the parameters of the crystal oscillator l.

The stage 5 of the multistage frequency divider 3 operates in a manner similar to the stage 4 of the same frequency divider as both stages have identical circuits.

The transistor 44 is unblocked by a positive signal from the output of the coincidence circuit 7. At the same time, the unblocked transistors 45 and 46 are blocked for a period t (FIG. 3d) determined by the parameters of the capacitor 49 (FIG. 1) and the resistor 51. During the whole period t;, (FIG. 3d), pulses from the output of the coincidence circuit 7 (FIG. 1) are unable to change the state of the blocked transistors 45 and 46 that is why the output voltage of the stage of the multistage frequency divider 3 (i.e., the voltage across the resistor 55) is equal to that of the bus of the power source 21. ln FlG. 3d. this state corresponds to the upper level of the voltage.

If the division factor of the stage 5 (FlG. l) of the multistage frequency divider 3 is also chosen equal to three, the transistors of the multivibrator are unblocked between the third and fourth pulses (FIG. 3:!) at the output of the coincidence circuit 7 (FIG. 1). ln so doing, the fourth pulse from the output of the coincidence circuit 7 unblocks the transistor 44 and blocks the transistors 45 and 46 which processes are repeated in the stage 4 of the multistage frequency divider 3.

Connected to the output of the stage 5 of the frequency divider 3 is the coincidence circuit 8 with the transistor 58 the collector whereof is connected to that ofthe transistor 41 of the coincidence circuit 7. A positive pulse from the collector of the transistor 26 is applied via the resistor 61 and the transistor 59 to the base of the transistor 57, thus unblocking the transistor 57 while the transistor 58 is still blocked. So the leading edge of the pulse at the input of the stage 6 also coincides with that at the output of the pulse shaper 2. Consequently. phase errors in the stages 4 and 5 of the multistage frequency divider 3 do not affect the stability of pulses at the output of the stage 6.

At the output of the last stageof the multistage frequency divider 3 (in this case. the stage 6). there are formed pulses the frequency whereofis also three times less than that of the input pulses (provided the division factor is chosen equal to three as for the preceding stages). The processes occurring in the stage 6 of the multistage frequency divider 3 and in the coincidence circuit 9 are similar to those in the stages 4 and 5 of the same frequency divider and in the coincidence circuits 7 and 8.

Formed at the output of the stage 6 of the multistage frequency divider 3 are negative pulses (FIG. 3e) of the same shape as the output pulses of the stages 4 and 5 (FIG. 1). A time interval 1 (FIG. 3e) in the stage 6 depends. as well as in the preceding stages. on the time constant of the RC-circuit comprising the capacitor 50 and the resistor 52.

A pulse signal is applied from the output of the coincidence circuit 9 to the pulse shaper l0 shaping pulses of a particular amplitude, polarity and impulse ratio required for the actuating device 11 of the timepiece which may comprise. for example. a vibromotor winding or a step-by-step motor winding.

Thus. in a timepiece with a frequency of the crystal oscillator 1 equal, for example. to 9720 Hz. the winding 12 of the actuating device 11 will receive pulses at a frequency of I20 HZ which pulses provides for direct driving of the central (minute) hand without any additional gear train. Another embodiment of a crystal electronic watch the block diagram whereof is presented in FIG. 2 operates in a manner similar to the above-described embodiment. By virtue of the fact that the proposed circuitry operates in a high-impulse-ratio mode. the period during which the transistors remain unblocked is reduced to an extent whereby the transistors remain blocked longer than unblocked. This allows for substantially reducing power consumption and.

consequently, for increasing the life of the power source which is especially important in a small-sized timepiece.

Due to a high regeneration margin possessed by multivibrators using transistors of different types of conductivity which are widely used in the proposed circuitry, it has become possible for the electric circuitry to maintain its normal operation even at a low (less than 1 V) supply voltage. In the proposed circuitry, it has also become possible to eliminate the accumulation of phase instability in the stages of the multistage frequency divider, thus ensuring more precise operation of the actuating device. Another advantage of the circuitry resides in that the stages of the multistage frequency divider use similar circuits with components having similar parameters which considerably simplifies the circuitry as a whole. The present invention has made it possible to substantially improve the technical characteristics and performance of the timepiece and to embody said timepiece as a watch.

What is claimed is:

l. A crystal electronic timepiece comprising a crystal oscillator; a multistage frequency divider electrically connected to said crystal oscillator. each stage of said multistage frequency divider having a multivibrator circuit with two transistors of different types of conductivity in the first and second arms thereof; transistors operating as a switch. each of said transistors operating as a switch being connected to the input of each said stage respectively in a common-emitter circuit, the collector of each said transistor operating as the switch being connected to the base of the transistor of the same type of conductivity switched into the first arm of said multivibrator circuit which has said transistor operating as the switch connected thereto; a first group of resistors each switched into each said multivibrator circuit respectively so that each said resistor of said first group is connected at one end to the base of said transistor switched into the first arm of said multivibrator, as .well as to the collector of said transistor operating as the switch connected to the input of said multivibrator circuit, the other end of each said resistor being connected to the collector of said transistor switched into the second arm of the same said multivibrator circuit; timing RC-circuits corresponding in number to said stages. each RC-circuit being switched into the base circuit of each said transistor switched into the second arm of each said multivibrator; a supplementary group of resistors; coincidence circuits each of which having one transistor, at least one of said coincidence circuits being connected to the output of each said stage respectively in a common-emitter circuit. the collector of said transistor of each said coincidence circuit being connected to that of said transistor of a preceding said coincidence circuit via a resistor of said supplementary group of resistors if said preceding coincidence circuit is even, or directly ifsaid preceding coincidence circuit is odd; a second group of resistors one of which is connected at one end to the base of said transistor of said coincidence circuit and, at the other end, to the collector of said transistor switched into the second arm of said multivibrator circuit, similar connections including all said resistors of said second group and correspond ing in number to said stages; a third group of resistors one of which is connected at one end to the collector of said transistor of said coincidence circuit and. at the other end, to the base of said transistor operating as the input of said first stage; a pulse shaper connected to the output of said coincidence circuit of said last stage of said multistage frequency divider; and an actuating device comprising a current time indicating device connected to the output of and controlled by said pulse shaper. 

1. A crystal electronic timepiece comprising a crystal oscillator; a multistage frequency divider electrically connected to said crystal oscillator, each stage of said multistage frequency divider having a multivibrator circuit with two transistors of different types of conductivity in the first and second arms thereof; transistors operating as a switch, each of said transistors operating as a switch being connected to the input of each said stage respectively in a common-emitter circuit, the collector of each said transistor operating as the switch being connected to the base of the transistor of the same type of conductivity switched into the first arm of said multivibrator circuit which has said transistor operating as the switch connected thereto; a first group of resistors each switched into each said multivibrator circuit respectively so that each said resistor of said first group is connected at one end to the base of said transistor switched into the first arm of said multivibrator, as well as to the collector of said transistor operating as the switch connected to the input of said multivibrator circuit, the other end of each said resistor being connected to the collector of said transistor switched into the second arm of the same said multivibrator circuit; timing RCcircuits corresponding in number to said stages, each RC-circuit being switched into the base circuit of each said transistor switched into the second arm of each said multivibrator; a supplementary group of resistors; coincidence circuits each of which having one transistor, at least one of said coincidence circuits being connected to the output of each said stage respectively in a common-emitter circuit, the collector of said transistor of each said coincidence circuit being connected to that of said transistor of a preceding said coincidence circuit via a resistor of said supplementary group of resistors if said preceding coincidence circuit is even, or directly if said preceding coincidence circuit is odd; a second group of resistors one of which is connected at one end to the base of said transistor of said coincidence circuit and, at the other end, to the collector of said transistor switched into the second arm of said multivibrator circuit, similar connections including all said resistors of said second group and corresponding in number to said stages; a third group of resistors one of which is connected at one end to the collector of said transistor of said coincidence circuit and, at the other end, to the base of said transistor operating as the switch connected to the input of the stage following said coincidence circuit, similar connections including all said resistors of said third group and corresponding in number to said stages; a resistor of said supplementary group connected at one end to the collector of said transistor of said coincidence circuit connected to the output of said first stage and, at the other end, to the input of said first stage; a pulse shaper connected to the output of said coincidence circuit of said last stage of said multistage frequency divider; and an actuating device comprising a current time indicating device connected to the output of and controlled by said pulse shaper. 